| Branch | Commit message | Author | Age | |
|---|---|---|---|---|
| main | [feat] Add .gitignore file | Alexis Hovorka | 17 months | |
| Age | Commit message | Author | ||
| 2022-12-13 | [feat] Add .gitignore fileHEADmain | Alexis Hovorka | ||
| 2022-12-07 | [feat] Add basic MicroSD card driver | Alexis Hovorka | ||
| 2022-12-01 | [feat] Solidify IO address map, implement SPI | Alexis Hovorka | ||
| 2022-11-30 | [feat] Add README | Alexis Hovorka | ||
| 2022-11-30 | [refactor] Change canonical start address to 0040 | Alexis Hovorka | ||
| 2022-11-30 | Initial commit | Alexis Hovorka | ||
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index : risc.git | |
| 16-bit RISC CPU/SOC in Verilog with self-hosting software infrastructure |
| aboutsummaryrefslogtreecommitdiff |